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Integrative Acceleration of First-Order Boolean Masking for Embedded IoT Devices
side-channel attack mask conversion IoT
2018/11/7
Physical attacks, especially side-channel attacks, are threats to IoT devices which are located everywhere in the field. For these devices, the authentic functionality is important so that the IoT sys...
An Analysis of FV Parameters Impact Towards its Hardware Acceleration
Homomorphic evaluation FV parameters Chinese Remainder Theorem
2017/3/21
The development of cloud computing services is restrained by privacy concerns. Centralized medical services for instance, require a guarantee of confidentiality when using outsourced computation platf...
Applying Cryptographic Acceleration Techniques to Error Correction
polynomial Barrett BCH error correcting codes
2015/12/23
Modular reduction is the basic building block of many publickey
cryptosystems. BCH codes require repeated polynomial reductions
modulo the same constant polynomial. This is conceptually very similar...
Recently, composite-order bilinear pairing has been shown to be useful in many cryptographic constructions. However, it is time-costly to evaluate. This is because the composite order should be at lea...
Acceleration of Differential Fault Analysis of the Advanced Encryption Standard Using Single Fault
Fault Analysis AES Cryptanalysis
2010/8/26
In this paper we present a speed up of the existing fault attack [2] on the Advanced Encryption Standard (AES) using single faulty cipher. The paper suggests a parallelization technique to reduce the ...