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2019年6月9至14日,电子科学与工程学院单伟伟教授、杨军教授等赴日本参加Symposia VLSI Technology and Circuits会议。单伟伟教授在Symposium on VLSI Circuits分会的C20 session作报告,主题为“A 923Gbps/W, 113-Cycle, 2-Sbox Energy-efficient AES Accelerator in 2...
近日,我校电子薄膜与集成器件国家重点实验室、集成电路特色研究中心、电子学院罗讯教授团队大四本科生邓至贤,在IEEE Transactions on Circuits and Systems I(IEEE TCAS-I)发表题为“Tunable quasi-circulator based on a compact fully-reconfigurable 180° hybrid for full-...
Field-programmable Integrated Circuits-Overview and Future Trends.
In this paper we discuss the question of when the Volterra series is appropriate for nonlinear circuits. We determine that the Volterra series representation is appropriate for circuits with fading me...
We study systems containing one memoryless nonlinearity. We show that two such systems have the same I/O operator only when they are related by simple scaling, delay, and loop transformations. The the...
We propose to use the dominant time constant of a resistor-capacitor (RC) circuit as a measure of the signal propagation delay through the circuit. We show that the dominant time constant is a quasico...
We present an efficient method for optimal design and synthesis of CMOS inductors for use in RF circuits. This method uses the the physical dimensions of the inductor as the design parameters and hand...
We describe the global optimization of phase-locked loop (PLL) circuits using geometric programming (GP). Equations for the jitter, frequency range, and power of the PLL are presented in GP form. An a...
Long design cycles due to the inability to predict silicon realities is a well-known problem that plagues analogRF integrated circuit product development. As this problem worsens for technologies belo...
As technology continues to scale beyond 100nm, there is a significant increase in performance uncertainty of CMOS logic due to process and environmental variations. Traditional circuit optimization me...
This thesis describes an efficient method for speeding up functional verification of arithmetic circuits namely linear network such as wallace trees, counters using linear algebra techniques. The circ...
With increasing data sets for processing, there is a requirement to build faster and smaller arithmetic circuits. One of the ways to improve the performance of higher order arithmetic units is to redu...
In this work, power supply noise contribution, at a particular node on the power grid, from clock/power gated blocks is maximized at particular time and the synthetic gating patterns of the blocks tha...
Researchers have made great progress in recent years in the design and creation of biological circuits — systems that, like electronic circuits, can take a number of different inputs and deliver a par...

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